Course Outcomes
After completion of this course, students will be able to –
7EC4-21.1 |
Demonstrate the ability to use various EDA tools for digital system design |
7EC4-21.2 |
Apply the steps involved in the procedure for using programmable logic devices (PLD) |
7EC4-21.3 |
Apply the concept of physical design process for Digital Integrated Circuits. |
7EC4-21.4 |
Analyze various combinational and sequential circuits using HDL on FPGA trainer kit. |
7EC4-21.5 |
Validate the functionality of digital CMOS logic circuits using EDA tools. |
CO-PO/PSO Mapping Matrix
COs |
PO1 |
PO2 |
PO3 |
PO4 |
PO5 |
PO6 |
PO7 |
PO8 |
PO9 |
PO10 |
PO11 |
PO12 |
PSO1 |
PSO2 |
7EC4-21.1 |
2 |
3 |
2 |
3 |
3 |
- |
- |
- |
- |
3 |
- |
3 |
3 |
2 |
7EC4-21.2 |
2 |
3 |
2 |
2 |
2 |
- |
- |
- |
- |
3 |
- |
3 |
3 |
2 |
7EC4-21.3 |
2 |
3 |
1 |
2 |
2 |
- |
- |
- |
- |
3 |
- |
3 |
3 |
2 |
7EC4-21.4 |
2 |
3 |
2 |
3 |
3 |
- |
- |
- |
- |
3 |
- |
3 |
3 |
2 |
7EC4-21.5 |
2 |
3 |
2 |
3 |
3 |
- |
- |
- |
- |
3 |
- |
3 |
3 |
2 |
7EC4-21 |
2 |
3 |
2 |
3 |
3 |
- |
- |
- |
- |
3 |
- |
3 |
3 |
2 |