Course Outcomes
After completion of this course, students will be able to –
|
2MVL1-06.1 |
Demonstrate the ability to use various EDA tools for digital system design. |
|
2MVL1-06.2 |
Describe principal parts in programmable circuits (PLD, FPGA) and procedure for designing of digital designs in programmable circuits. |
|
2MVL1-06.3 |
Apply efficient techniques at HDL level for improving power and speed of the systems using EDA tool. |
|
2MVL1-06.4 |
Develop and prototype the digital systems design using HDL, Verilog and FPGA. |
|
2MVL1-06.5 |
Design and simulate different combinational and sequential circuits using Verilog-language. |
CO-PO/PSO Mapping Matrix
|
COs |
PO 1 |
PO 2 |
PO 3 |
PSO 1 |
PSO 2 |
|
2MVL1-06.1 |
3 |
3 |
3 |
3 |
3 |
|
2MVL1-06.2 |
3 |
3 |
3 |
3 |
3 |
|
2MVL1-06.3 |
3 |
3 |
3 |
3 |
3 |
|
2MVL1-06.4 |
3 |
3 |
3 |
3 |
3 |
|
2MVL1-06.5 |
3 |
3 |
3 |
3 |
3 |
|
2MVL1-06 |
3 |
3 |
3 |
3 |
3 |
