Course Outcomes
After completion of this course, students will be able to:
2MVL4.2.1 |
Explain the fundamental of Evolution of programmable devices with basic introduction to AND-OR structured Programmable Logic Devices. |
2MVL4.2.2 |
Describe Logic Blocks and Interconnection Resources, Economics and applications of FPGAs. |
2MVL4.2.3 |
Understand Static RAM Programming, Anti Fuse Programming, EPROM and EEPROM Programming Technology and Commercially available FPGAs. |
2MVL4.2.4 |
Design and analysis of Technology Mapping for FPGAs its Logic Synthesis, Logic Optimization and Technology Mapping and Lookup Table Technology Mapping |
2MVL4.2.5 |
Explore various application areas of Logic Block Functionality versus Area-Efficiency |
CO-PO/PSO Mapping Matrix
COs |
PO1 |
PO2 |
PO3 |
PSO 1 |
PSO 2 |
2MVL4.2.1 |
2 |
2 |
3 |
3 |
2 |
2MVL4.2.2 |
3 |
2 |
2 |
3 |
1 |
2MVL4.2.3 |
2 |
3 |
3 |
2 |
1 |
2MVL4.2.4 |
3 |
2 |
2 |
2 |
1 |
2MVL4.2.5 |
3 |
2 |
2 |
1 |
2 |
2MVL4.2 |
2 |
2 |
2 |
2 |
1 |