Course Outcomes
After completion of this course, students will be able to –
2MVL1-02.1 |
Understand various abstraction levels in Verilog HDL. |
2MVL1-02.2 |
Design and model sequential circuit using behavioral modeling. |
2MVL1-02.3 |
Design the complex combinational and sequential logic circuits using various |
2 MVL1-02.4 |
Use EDA tool to design complex combinational and sequential circuits. |
2MVL1-02.5 |
Develop and prototype digital systems design using HDL, Verilog and FPGA. |
CO-PO/PSO Mapping Matrix
COs |
PO 1 |
PO 2 |
PO 3 |
PSO 1 |
PSO 2 |
2MVL1-02.1 |
2 |
2 |
2 |
3 |
3 |
2 MVL1-02.2 |
3 |
2 |
2 |
3 |
3 |
2 MVL1-02.3 |
3 |
2 |
2 |
3 |
3 |
2 MVL1-02.4 |
3 |
2 |
2 |
3 |
3 |
2 MVL1-02.5 |
3 |
2 |
2 |
3 |
3 |
2MVL1-02 |
3 |
2 |
2 |
3 |
3 |