Course Outcomes
After completion of this course, students will be able to:
1MVL5.1
|
Explain about the design of sequential & combinational digital circuits using Hardware description languages. |
1MVL5.2 |
Apply the VLSI Design Flow, Electronic design automation tools and algorithms |
1MVL5.3 |
Implement schematic and layout for different combinational and sequential circuits using EDA tools. |
1MVL5.4 |
Design circuits using VHDL and Implement with FPGA development boards. |
1MVL5.5 |
Design smaller application chips using automatic test program generation, multilevel logic synthesis. |
CO-PO/PSO Mapping Matrix
COs |
PO 1 |
PO 2 |
PO 3 |
PSO 1 |
PSO 2 |
1MVL5.1 |
1 |
2 |
2 |
3 |
3 |
1MVL5.2 |
1 |
2 |
2 |
3 |
3 |
1MVL5.3 |
2 |
2 |
2 |
3 |
3 |
1MVL5.4 |
2 |
2 |
2 |
3 |
3 |
1MVL5.5 |
2 |
2 |
2 |
3 |
3 |
1MVL5 |
2 |
2 |
2 |
3 |
3 |